A664 (AFDX) End System

Overview

Medha’s A664 End System is an FPGA-based solution implemented in a compact 3U VPX form factor. Compliant with ARINC 664 Part 7, it provides secure and reliable communication with deterministic Quality of Service (QoS), ensuring bounded latency and jitter.

Designed for network communication in safety-critical systems, the A664 End System incorporates onboard integrity checking, redundancy and flow control. A PCIe interface enables communication with the host system.

The hardware and firmware are developed in-house and can be customised to suit specific form-factor and host-interface requirements. The solution is also available as an IP core.

Key Features
  1. Xilinx Zynq SoC-based design
  2. PCIe host interface
  3. ARINC 664 Part 7 compliant
  4. Supports up to 256 receive virtual links
  5. Supports up to 128 transmit virtual links
  6. Dual Ethernet channels supporting 10/100/1000 Mbps
  7. Logical channels over a physical network for traffic isolation
  8. Bandwidth allocation for predictable data delivery
  9. Precision Time Protocol (PTP) support for time synchronisation
  10. Non-volatile memory for configuration and network diagnostic data
  11. ARINC 615A data-loader interface
  12. SNMP and ICMP support

 

Block Diagram